In radio communication applications the designs are continuously aiming for simpler and cheaper radio architectures to increase integration level of the mobile terminals. Conventionally, a direct upconversion transmitter has at least an I/Q modulator, an RF mixer, a filter and a power amplifier. The I/Q modulator is an efficient way to generate phase-modulated signals. It relies on two orthogonal signals, I (in-phase) and Q (quadrature), to produce a signal complex waveform. In a direct upconversion the I/Q modulator transforms the frequency spectrum of each orthogonal input signal to the RF carrier frequency. As such, two digital-to-analog (D/A) converters are needed to transform a digital baseband into an analog baseband, as shown in FIG. 1a. In such a conventional direct upconversion transmitter, baseband digital data is resolved into in-phase and quadrature components. These data streams are then converted into analog, lowpass, baseband signals using separate digital-to-analog converters. These quantized, analog signals are then filtered by low-pass reconstruction filters in order to remove copies of the signals centered at harmonics of the baseband clock frequency. The filtered analog signals are used as inputs to I/Q modulator. As shown in FIG. 1a, the I/Q modulator comprises two baseband-to-RF upconversion mixers with their output signals summed. The I/Q modulator has two baseband inputs and two local oscillator inputs with 90° phase shift between the oscillator inputs (cos ωlt and sin ωlt, with ωl being the frequency of the local oscillator). The output of the I/Q modulator is an RF signal.
In order to make a complete transmitter, meeting the requirements of a real wireless standard, it may be necessary to include the following components:                a power amplifier (PA) to increase the output power to the required level;        a bandpass filter to suppress noise and/or spurious; and        a power control module to achieve dynamic range capability, through one or more of the following means: 1) power amplifier gain adjustment; 2) variable-gain amplifier gain adjustment; and 3) I/Q modulator output power adjustment.        
An example of such a direct upconversion transmitter is shown in FIG. 1b. 
Fundamental problems associated with the direct upconversion transmitter using an I/Q modulator are:                1. High-power consumption in the I/Q Modulator block;        2. Non-ideal performance in the analog components within the I/Q modulator, such as the non-linearity of the baseband amplifiers, carrier feed-through due to mismatch effects;        3. Bandwidth limited by analog baseband circuits; and        4. Large die area required for integrating all functions.        
Current-steering D/A-converters may solve some the aforementioned problems associated with convention upconversion transmitter. A conventional current-steering D/A-converter comprises a plurality of parallel unit cells divided into two or more sub-blocks, as shown in FIG. 2. In the figure, the converter is presented in a typical segmented configuration, wherein the current in the LSB (least-significant bit) cells is generated with parallel binary weighted units whereas the MSB (most-significant bit) sub-block has a set of unary coded cells. The number of the unary coded cells is (2m−1), where m is the number of bits in the MSB sub-block. Thus, the current for the first bit in the MSB sub-block is generated in one unary coded cell, the current for the second bit in the MSB sub-block is generated in two unary coded cells, and the current for the m bit is generated in 2m−1 cells. The D/A converter has two current paths for conveying differential currents Iout and Ixout so that the analog signal output Vout can be formed with two external load resistors (not shown).
Typically, each of the parallel unit cells comprises a differential switch pair connected in series to a cascode current source, as shown in FIG. 3. The differential switch pair has two current control paths Q1 and Q2, connected to the output terminals Vo and Vxo of the D/A converter. The currents in these paths are controlled by complementary signals VLN+ and VLN−, which are provided by a digital control logic and are indicative of the value of signal N. The cascode current source has two transistors Q3 and Q4 so as to allow the currents in the cell to be adjusted by DC bias4.
The D/A converters and I/Q modulators are complex and high performance analog elements. The requirement of these analog elements generally limits the flexibility of the RF transmitter.
Ideally a digital radio transmitter is independent of the radio standard and can be used in all of the modulation schemes and signal frequencies. In practice, this requires a D/A converter that is capable of operating at least twice the maximum radio frequency of the used standard. One of the major problems associated with D/A converters for use in RF generation is the high sampling frequency. If an RF signal of 1.8 GHz is generated, the sampling rate in the digital baseband must be at least 3.6 GHz. Furthermore, in order to effectively filter the mirror image component around the frequency difference between the sampling frequency and the digital signal frequency, a much higher sampling rate is needed. A D/A converter with such a high sampling frequency is impractical to implement because of the high price and high power consumption. For that reason, D/A converters are typically used in the baseband or in the low IF range. These converters are used along with high performance analog mixers for RF generation. These I/Q mixers consume easily tens of milliamperes of DC currents. Moreover, even when the D/A converters are used in the baseband and in the IF range, the noise current spikes occur because of the high data rate of hundreds of megahertz. These noise spikes can limit the performance of the RF transmitter.
It is thus advantageous and desirable to provide a cost-effective method and device for carrying out digital-to-analog conversion associated with RF generation. At the same time, the power consumption is reduced.
Yuan (EP1338085) discloses a direct digital amplitude modulator wherein an upconverting type of converter cell is used. In Yuan, a number of sub-switched current source units are switched on or off according to the combinations of the digital input signal and the delayed or non-delayed clock signals to produce or to cancel quantized RF, IF or DC currents and/or voltages at the time precisely controlled by the delayed clock signals. As such, the performance of the circuit is low due to a slow settling of the current in the current source after switching the current source on.
It is advantageous and desirable to provide a method and device for direct digital amplitude modulation wherein the cutting off of the current flow is avoided.